This invention relates to analog-to-digital converters and, more particularly, to a D.C. stabilized analog-to-digital converter wherein D.C. drift in the converter is detected and compensated so as to minimize errors in the produced digital signal.
Analog-to-digital converters are widely used in divers applications in order to exploit the accuracy and speed of digital processing techniques upon information which may originate in the form of analog signals. As one example thereof, video signals, such as color television signals, which originate as analog signals, may be digitized for the purpose of exploiting certain advantageous processing techniques. One such processing technique is used to correct time-base errors which may be present in the video signal. Such time-base errors may occur when a video signal is recorded and subsequently reproduced because of small changes or fluctuations in the reproducing apparatus relative to the recording apparatus. Thus, if video signals are recorded and then reproduced by a video tape recorder (VTR), time-base errors may result if the speed at which the magnetic tape is transported during a reproducing operation differs from that during a recording operation, or if the rotary speed of the transducers during a reproducing operation differs from the rotary speed thereof during a recording operation, or if the tape is subjected to shrinkage, stretching, and the like after the video signals have been recorded but before such video signals are reproduced.
One example of time-base error correcting apparatus which can be used to correct the aforementioned time-base errors is described in U.S. Pat. No. 3,860,952. In that apparatus, the analog video signal, after being reproduced from a VTR, is converted to a digital signal and then written into a memory device at a rate synchronized with the time-base error rate, these stored digital video signals then being read out of the memory device at a uniform clocking rate. This results in minimizing time-base errors in the digital video signal that eventually is read out of the memory; and the corrected video signal then can be reconverted back to its analog form for transmission to video signal receiving and displaying apparatus. The analog-to-digital converter described in the aforementioned patent is of the so-called parallel-serial converter wherein the incoming analog signal is sampled and each sampled portion is converted to a digital carrier in two separate parallel-bit conversions which occur serially. In the first conversion, the analog signal is supplied to a first set of coarse comparators wherein the sampled level is compared to predetermined voltage levels, the coarse comparators thus providing a first coarse conversion of the sample. This coarse conversion is encoded to a coarse digital signal, and the complementary outputs of the comparators are reconverted to an inverse coarse analog signal which is summed with the original sample. The summed output, which is proportional to the difference between the original analog sample and the coarse analog sample, is supplied to a set of fine comparators whereat a fine digital signal is produced. The combination of the coarse and fine digital signals is a digital representation of the original analog sample.
An improved version of such a parallel-serial analog-to-digital converter is disclosed in copending Application Ser. No. 681,507, filed Apr. 29, 1976 and assigned to the assignee of the present invention. In the improved parallel-serial analog-to-digital converter, the reference voltages which are applied to the set of fine comparators have a range which is greater than and offset in respect to the reference voltage steps which are applied to the coarse comparator. Also, the least significant bit of the coarse analog-to-digital converter is added to the output of the fine analog-to-digital converter. Hence, in the improved version, inaccuracies in the digital signal which may arise from non-uniform reference voltages and/or operations of the comparators are minimized.
One problem of parallel-serial analog-to-digital converters of the foregoing type is that D.C. drift in particular circuit components may result in significant errors in the resultant digital signal. For example, if the digital-to-analog converter and/or the subtracting (or inverse summing) circuit is subjected to D.C. drift, the signal which is supplied to the fine analog-to-digital converter may be more (or less) than the actual difference between the original analog signal and the coarse analog signal. If there are a number of coarse converter stages and fine converter stages, the effect of such D.C. drift is cumulative, resulting in substantial errors in the digitized analog signal. If the analog signal is a video signal, as has been assumed above, the ultimate video picture reproduced from that video signal, following its digitization and then analog reconversion, will be substantially degraded. Accordingly, there is a need to detect D.C. drift in the circuit components and to correct or compensate such D.C. drift.
A video signal includes periodic horizontal blanking intervals during which a horizontal synchronizing pulse is transmitted and a burst signal (the chrominance subcarrier reference signal) also is transmitted. According to various standards which have been adopted, such as the NTSC format, the minimum level of the synchronizing pulse, known as the sync tip level, and the quiescent level of the horizontal blanking interval, known as the pedestal level, are assigned certain predetermined, reference levels. The video information signal then can be referenced to the sync tip or pedestal levels, and these levels can be detected and used to control the gain of video amplifiers, as well as other video processing circuits. It was thought that the sync tip and/or pedestal levels also could be used to control or compensate for D.C. drift in the analog-to-digital converter components. However, the D.C. level of the video signal, including the sync tip and pedestal levels, may vary from their desired, predetermined levels when, for example, the video signal is reproduced from a record medium. Even though D.C. restore circuits are well known and commmonly used to restore the D.C. level of the reproduced video signal, the sync tip and/or pedestal levels of the restored video signal still may differ from their desired levels because of noise, D.C. drift, and other factors. Thus, it is believed that the sync tip level or the pedestal level of a video signal cannot be used as a reference against which D.C. drift is detected.